"""Pure conventional builder returning portable operators, states and costs."""
import random, time

def build(memory_width,routing_width,public_ports,seed):
    start=time.monotonic()
    if not 1<=memory_width<=12 or not 1<=routing_width<=12:raise ValueError('Calibration width ceiling')
    if public_ports!={'address_positions':8,'context_positions':8,'clock':'external-step'}:raise ValueError('Fixed external schema required')
    if memory_width+routing_width+1>64:raise ValueError('Cell ceiling')
    edges=routing_width*33+memory_width*routing_width+memory_width
    if edges>1024:raise ValueError('Execution edge ceiling')
    rng=random.Random(seed)
    route=[[rng.gauss(0,.25) for _ in range(32)] for _ in range(routing_width)]
    readout=[[rng.gauss(0,.05) for _ in range(routing_width)] for _ in range(memory_width)]
    manifest={'version':'conventional-v1','operators':{'memory':'gated accumulator h+=(w*(tanh(v)-h)); public address WRITE gates','routing':'dense affine + tanh','readout':'bilinear sum(h_i*V_ij*phi_j)'},'parameters':{'W':route,'b':[rng.gauss(0,.25) for _ in range(routing_width)],'V':readout},'state':{'h':[0.0]*memory_width,'delay_buffer':[0.0]*memory_width,'tick':0},'ports':public_ports,'schedule':['read committed one-step memory','query affine/tanh routing','readout before feedback','WRITE gate commit exactly once'],'provenance':{'seed':seed,'task_information':'public ports only; no task permutation or labels','coordinates':'unused; no 3D simulation'},'costs':{'cells':memory_width+routing_width+1,'execution_scalar_edges':edges,'development_edges':0,'construction_ticks':1,'parameter_scalars':routing_width*33+memory_width*routing_width,'state_scalars':2*memory_width,'max_messages_per_event':64,'max_message_bytes_per_event':8192}}
    if time.monotonic()-start>2:raise TimeoutError('Construction timeout')
    return manifest